The present invention relates to semiconductor devices, and more particularly to semiconductor devices having a cylindrical germanium nanowire structure and methods for manufacturing the same.
As the feature size of CMOS semiconductor devices is continuingly scaled down, the short channel effect causes a decrease in the threshold voltage. A decrease in the threshold voltage, however, leads to an increase in the off-state leakage current. In general, the short channel effect can be eliminated or reduced by reducing the thickness of the gate dielectric layer and increasing the doping concentration of the substrate or using source/drain halo structures. However, this may result in an increase in the gate dielectric tunneling current and degradation in the mobility of the channel carriers, leading to an increase in the static power consumption and a decrease in device performance. Furthermore, thinning the gate dielectric layer will have a significant polysilicon depletion effect, resulting in a drop in the inversion charge and a decrease in the drive current.
Therefore, conventional techniques of CMOS downscaling cannot overcome the conflicting requirements of short channel effect and power and performance, and have been replaced with the so-called “extended CMOS technology” that includes stress enhancement technology, high-k gate dielectric and metal gate technology. These technologies can temporarily alleviate issues related to short-channel effects including carrier mobility degradation and tunneling current increase. At present, the stress-strain technology applied to the mass production mainly refers to uniaxial tensile stress. For NMOS devices, the technologies are the contact etch stop layer (CESL), stress memorization technique (SMT), and recessed regions filled with silicon carbide (SiC). For PMOS devices, the recessed source and drain regions are filled with SiGe. However, these technologies are also subjected to “size-scaling” constraints. For example, the tensile stress strongly depends on the device feature size (channel length). As the channel length is getting smaller, there is a limit imposed on the carrier mobility.